unix - makefile interpret variable in a loop -

unix - makefile interpret variable in a loop -

i'm trying variable interpreted variable in loop, , can't figure out how should done. test is:

test= 1 2 3 1 := one1 2 := two2 3 := three3 all: @echo $(test) @for num in $(test) ; \ echo $($$num) ; \ done ; exit 0 foo: echo

the end result: have number of makefiles include pointing 1 central makefile. i'd these individual makefiles contain variables of files concatinate - different directories have different files. so, makefile in ./1/ might be: 1 := "file0 file1 file2" 2 := "other0 other1 other2" 3 := "boo.txt blah.txt" include ../main.mk

and ./2/ might 1 := "file0 file5 file6" 2 := "foo bar baz" three:= "blah.txt" include ../main.mk

that can't work way have written. crossing boundaries.

by time shell loop running create variables have been expanded loop body ends containing 'echo ;'.

you need loop @ create level if want intended output.

something like:

test= 1 2 3 1 := one1 2 := two2 3 := three3 define loop $(foreach n,$(test),@echo $($n) ) endef all: @echo $(test) $(loop)

though sense there should simpler way don't see @ moment.

unix makefile make gnu-make